Description
**Qualifications.
**:- Master's degree or higher in electrical engineering.
- Expertise in static timing analysis.
- Strong coding skills in languages such as Python, TCL, Perl.
- Strong methodology development background.
- Strong analysis and communication skills.
**Helpful Experience.
**:- Familiarity with Ansys Redhawk/RHSC and PDN concepts.
- Good insight in designing flows and software structure.
- Familiarity with Place and Route tools and concepts.
- Familiarity with post-silicon concepts, such as ATPG vectors and test, silicon debug, defect and parametric limited yield.
- Familiarity with HSPICE and transistor-level behavior.
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