Full-time

Senior Engineer - CMOS & Metallization Test Structure Design and Layout

Posted by Micron Technology, Inc • June 05, 2026

📍 tlaquepaque, tlaquepaque, Mexico
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Description

JR88115 Senior Engineer - CMOS & Metallization Test Structure Design and Layout Relocation Level

TBD

Responsibilities
  • Support process development activities through memory cell-based test structure solutions by actively engaging with Process Integration, Product and Design, Electrical Characterization, Advanced Mask Development and Design Rule teams.
  • Interpret electrical DUT (Device under Test) definition and build completed Test Element Groups (TEGs) with high confidence functionality on silicon.
  • Implement novel solutions as the need arises to study failure mechanisms and monitor the health of silicon.
  • Assist with parametric correlation and debug to ensure build accuracy.
  • Verify and validate test structure documentation and related parametric information.
Minimum Qualifications
  • Bachelor of Science in Electrical or Microelectronic Engineering with 5 years of experience.
  • Hands‑on e...

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