Senior Staff ASIC Design Egineer - AI / ML Hardware IP
Posted by Confidential • June 05, 2026
Description
Position: Senior Staff ASIC Design Engineer – AI/ML Hardware IP
Location: On-site in Canada
We’re working with a global semiconductor leader to hire a Senior Staff ASIC Design Engineer focused on developing cutting-edge AI/ML hardware IP. This role is designed for a senior contributor who can lead architecture definition, RTL development, and integration across complex SoC designs. You'll work cross-functionally to optimize performance, area, power, and verification coverage in highly scalable AI/ML systems.
Key Responsibilities:
Define and implement micro-architecture based on high-level AI/ML design requirements.
Own RTL development (Verilog/SystemVerilog), optimizing for performance, area, and power.
Integrate multiple sub-IP blocks into cohesive larger systems.
Drive Linting, CDC, Synthesis, and Power Intent flow execution a...
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